Field of the Invention
The invention relates to a field-effect-controllable semiconductor component which is provided in a semiconductor body. The semiconductor component has at least one source zone and at least one drain zone of a first conductivity type. The semiconductor component has at least one body zone of a second conductivity type. The body zone is provided between the source zone and the drain zone. The semiconductor component has at least one gate electrode, which is insulated from the semiconductor body through the use of a dielectric and via which a channel zone can be formed in the body zone when a gate potential is applied to the gate electrode. The invention also relates to a method of fabricating the semiconductor component.
Such a field-effect-controllable semiconductor component is, for example, the MOS (Metal Oxide Semiconductor) transistor, or MOSFET (Metal Oxide Semiconductor Field Effect Transistor) for short. The construction and the method of operation of a MOSFET is known and requires no further explanation.
A MOSFET typically functions as a controllable switch and should therefore have the smallest possible ohmic resistance in the on state. In actual fact, however, MOSFETs in the on state have a non-negligible so-called xe2x80x9con resistance.xe2x80x9d In accordance with J. P. Stengl, J. Tihanyi, Leistungs-MOS-FET-Praxis [Power MOS-FET technology], Pflaum-Verlag Munich, 1992, page 44, the on resistance RON has the following composition:
RON=RK+RS+RCH+RAKJ+REPI+RSUBxe2x80x83xe2x80x83(1)
The individual resistance elements of the on resistance RON in accordance with equation (1) are described briefly below: RK designates the contact resistance of the source electrode with respect to the semiconductor body at the front side of the wafer. The resistance RS is essentially determined by the doping concentration in the source region. RAKJ designates the so-called accumulation resistance, which is often also referred to as JFET (Junction Field Effect Transistor) resistance and results from the formation and mutual influencing of depletion regions of adjacent cells of a semiconductor component. REPI designates the resistance caused by the doping concentration of the drift pathxe2x80x94if present. In vertical semiconductor components, the drift path is usually realized by one or more epitaxial layers. In particular in high-blocking-capability semiconductor components having a blocking capability of several hundred volts, the resistance element REPI contributes by far the greatest proportion of the on resistance RON, whereas it is often negligibly low in the case of components in the low-voltage range. RSUB designates the resistance of the substrate or of the drain region. Since the source resistance RS and the substrate resistance RSUB typically have a very high doping concentration, they are negligibly low relative to the other resistance elements.
RCH designates the channel resistance. The channel resistance results in the event of application of a gate potential and of a voltage between drain and source electrodes from the inversion current induced beneath the gate electrode. In accordance with B. J. Baliga, Power Semiconductor Devices, PWS-Publishing Company, page 362, the channel resistance RCH is defined as follows:                               R                      C            ⁢                          xe2x80x83                        ⁢            H                          =                  L                      W            ·                          μ                              N                ⁢                                  xe2x80x83                                ⁢                S                                      ·                          C                              O                ⁢                                  xe2x80x83                                ⁢                X                                      ·                          (                                                V                  c                                -                                  V                  T                                            )                                                          (        2        )            
In equation (2), L and W designate the channel length and the channel width, respectively, xcexcNS designates the mobility of the electrons in the channel region, VG and VT designate the gate potential and the thermal potential, respectively. COX designates the oxide capacitance, which is essentially determined by the oxide thickness and also the doping concentration in the channel region. Given a predetermined transistor geometryxe2x80x94i.e. given a constant channel length L, channel width W and oxide capacitancexe2x80x94in a MOSFET the channel resistance is inversely proportional to the mobility xcexcNS.
The mobility is characterized on the one hand by scattering of the electrons contributing to the channel current with dopants in the channel region, and on the other hand by scattering of the electrons at the interface between the semiconductor body and the gate oxide. These scattering mechanisms, which are also represented on pages 10-11 and 18-19 in the abovementioned book by B. J. Baliga, brake the electrons and thus reduce the effective current density Jeff in accordance with
Jeff=nelvelxe2x80x83xe2x80x83(3)
where nel and vel designate the number and velocity of the electrons. The effective mobility of the electrons decreases, as a result of which the channel resistance RCH increases undesirably in accordance with equation (2).
Furthermore, there are even further resistance elements that exist, for example mounting-governed resistances.
In order to minimize the power loss consumed by the semiconductor component itself, the on resistance RON in accordance with equation (1) should be as small as possible. There are various measures for reducing the resistance elements, some of which measures are presented briefly below:
In order to reduce the source resistance RS and substrate resistance RSUB, the doping concentration in these regions is typically increased as far as possible. Furthermore, in the case of vertical MOSFETs, the substrate resistance RSUB can be reduced by reducing the thickness of the drain region by thinning the semiconductor body by grinding from the rear side of the wafer.
In vertically configured MOSFETs, the epitaxial resistance REPI can be greatly reduced by forming the semiconductor component as a compensation structure. Semiconductor components according to the compensation principle are described for example in U.S. Pat. No. 5,216,275 and U.S. Pat. No. 4,754,310 and also in International Publication No. WO 97/29518 and in German Patent No. DE 43 09 764 C2.
When a semiconductor component is formed with trench structures or so-called trenches in which the gate electrodes are provided, the parasitic JFET effect can be suppressed to the greatest possible extent, as a result of which the accumulation resistance RAK is minimized.
In particular in the case of so-called xe2x80x9csmart power MOSFETsxe2x80x9d, which, as is known, are configured for very low voltages, the channel resistance RCH contributes by far the greatest proportion of the on resistance RON. A relationship between breakdown voltage and channel resistance is presented in D. A. Grant, J. Gowar, Power MOSFETsxe2x80x94Theory and Applications, J. Wiley and Sons, 1989, on page 76. By way of example, in the case of a MOSFET rated for a voltage between 50 V and 100 V, the channel resistance RCH makes up about 35% of the total on resistance RON. In the case of low-voltage MOSFETs having a much lower blocking capability of 20 V or 12 V, the channel resistance RCH even makes up a proportion of 60% or 80%, respectively, of the total on resistance RON.
In order to reduce the influence of the channel resistance RCH, the transistor geometryxe2x80x94for example the channel length L, the channel width W and the oxide capacitance COXxe2x80x94can be varied as much as possible, with the assistance of equation (2). However, the transistor geometry of a semiconductor component is to a very great extent predetermined, so that optimization to that effect is possible only to a limited extent. With the exception of the abovementioned optimization of the transistor geometry, however, further measures for reducing the channel resistance RCH are not known at the present time, so that low-voltage MOSFETs, in particular, have an on resistance that is greatly dependent on the channel resistance. This is a state which, understandably, should be avoided.
It is accordingly an object of the invention to provide a field-effect-controllable semiconductor component which overcomes the above-mentioned disadvantages of the heretofore-known components of this general type and which has a lower channel resistance in the on state whilst retaining the geometry of the semiconductor component.
With the foregoing and other objects in view there is provided, in accordance with the invention, a field-effect-controllable semiconductor configuration, including:
a semiconductor body;
a source zone and a drain zone of a first conductivity type disposed in the semiconductor body;
a body zone of a second conductivity type disposed between the source zone and the drain zone;
a gate electrode configured to form a channel zone in the body zone if a gate potential is applied to the gate electrode;
a dielectric insulating the gate electrode from the semiconductor body;
at least a first region and a second region of the second conductivity type provided in the channel zone;
the first region having a first doping concentration, the second region having a second doping concentration, the second doping concentration being lower than the first doping concentration;
the source zone, the drain zone, the body zone, and the gate electrode forming a semiconductor component having a threshold voltage and a given on resistance; and
the first region and the second region being configured such that a combination of the first region and the second region results in the threshold voltage being greater than zero and in the given on resistance being lower than an on resistance resulting from a channel zone being doped with only one of the first doping concentration and the second doping concentration.
Accordingly, a generic field-effect-controllable semiconductor component provided in a semiconductor body is provided, in which in each case at least a first and a second region of the second conductivity type are provided, the regions being provided in the channel zone, in which the first region has a first doping concentration and the second region has a second doping concentration, which is lower than the first doping concentration, in which the combination of the two regions produces a semiconductor component threshold voltage greater than zero and the on resistance is lower than that merely due to a channel zone doped with the first or second doping concentration.
By virtue of the introduction of a highly doped doping layer according to the invention within the channel zone and by virtue of the reduction of the doping concentration in the channel region outside the doping layer, the scattering of the electrons at doping atoms in the channel region can essentially be limited to the region of the doping layer. In addition to this, it is also possible to restrict interface scattering to precisely this region, so that the interface scattering between semiconductor body and dielectric predominantly takes place in the doping layer. The reduction of the abovementioned scattering mechanisms to the region of the doping layer enables the surface mobility of the electrons contributing to the current flow in the channel region to be increased to a greater or lesser extent depending on doping conditions and layer thickness, which ultimately leads to a reduction in the channel resistance. In particular in those semiconductor components which have a very low breakdown voltage and in which the channel resistance thus makes a substantial contribution to the on resistance, the power dissipated in the semiconductor component can be significantly reduced by the abovementioned measure. It is thus possible to provide semiconductor components having a reduced chip area requirement, which is particularly advantageous in particular for economic reasons.
In contrast to a known DMOS (Diffusion Metal Oxide Semiconductor) transistor, in which, likewise, a doped layer of the same conductivity type as the channel zone outdiffuses from the source zone and adjoins the latter, the semiconductor component according to the invention is distinguished by a very sharply delimited doping layer provided in the channel region of the body zone. The layer thickness of this doping layer is typically very much smaller in relation to the channel length.
The doping concentration in the channel zone should ideally be as small as possible, so that a high switching speed is possible as a result of fast charge reversal. However, the doping must not be too low, since otherwise the semiconductor component loses its blocking capability in the off state. In order to ensure the blocking capability, the doping concentration should be as large as possible, but not too large, since otherwise the threshold voltage required for switching on the semiconductor component is too high. Semiconductor components of the generic type therefore have, even in the case of a DMOS structure, a very largely homogeneous doping concentration in the entire channel zone, which, depending on the application, offers a compromise for the doping concentrations just mentioned and, therefore, cannot achieve an improvement in the electron mobility and thus the on resistance.
In a complete departure from known semiconductor components, the semiconductor component according to the invention has, in the channel zone, two regions of the same conductivity type which are doped differently and typically also have different thicknesses. The doping concentration of these regionsxe2x80x94or of at least one of these regionsxe2x80x94is chosen in such a way that a threshold voltage brought about by the doping concentration of only one region lies outside the specified or intended threshold voltage. By way of example, the second region is doped so lightly that a corresponding semiconductor component is xe2x80x9cnormally onxe2x80x9d, that is to say is activated even in the off state. The first region is doped as highly as possible, so that such a semiconductor component has such a high threshold voltage that it could not be switched on under normal conditions. Only the combination or interaction of the two regions produces a semiconductor component with the desired threshold voltage. However, the semiconductor component is distinguished by a high blocking capability brought about by the highly doped region and, at the same time, by a high electron mobility, and hence a reduced on resistance, brought about by the lightly doped region.
In a highly advantageous embodiment, the doping layer is configured as a negligibly thin layerxe2x80x94generally also referred to as delta doping layerxe2x80x94in the channel zone. A negligibly thin layer thickness is to be understood to be a layer of one or a few atomic layers up to a few nanometersxe2x80x94for example up to 20 nm. In one embodiment, the doping layer has a doping density per unit area of more than 1011 cmxe2x88x922, advantageously in the range from 1012 cmxe2x88x922 to 1013 cmxe2x88x922. At any rate, however, the doping concentration in the delta doping layer should be chosen at least to have a magnitude such that the functionality of the semiconductor component, typically configured as a normally off MOSFET, is preserved. This means that the doping concentration in the delta doping layer suffices by itself to ensure the blocking capability of the channel zone and hence of the semiconductor component in the off state.
In a typical embodiment, the second region in the channel zone, that is to say the region outside the doping layer, has an approximately intrinsic doping concentration or a very much lower doping concentration than the doping layer. Typically, the doping concentration in the doping layer should not be greater than 1012 cmxe2x88x923 or should be at least a factor of 100 less than in the doping layer.
In a typical embodiment of the invention, the doping layer is provided within the channel zone in such a way that it divides the channel zone into a first and into at least one further channel zone region, the two channel zone regions being completely spaced apart from one another by the doping layer. As an alternative, it would also be conceivable for the doping layer to adjoin at least one of the source zones at least partially, advantageously completely with one of its surfaces.
In a typical embodiment of the invention, a surface of the doping layer is provided essentially perpendicularly to the current flow direction of the electrodes when a gate potential is applied. Typically, the doping layer has an extremely thin or its thinnest layer thickness precisely in the part in which the electron current is perpendicular to the two surfaces. These measures reduce the channel constriction to the layer thickness in the doping layer. It goes without saying that the electron current need not necessarily be perpendicular to one of the surfaces. However, the scattering of the electrons in the doping layer would then increase with an increasing angle deviating from the perpendicular, since the effective path length of the electrons in the doping layer increases. However, this would in turn lead to a higher on resistance.
The semiconductor component is typically configured as a MOS transistor (MOSFET), in particular as a normally off MOSFET. The invention can advantageously be used both in the case of a lateral transistor and in the case of a vertical transistor. In the case of a vertical transistor, the latter may be configured as a simple D-MOSFET, but also as a U-MOSFET or as a V-MOSFET. Furthermore, other transistor structures, such as, for example, MOSFETs fabricated using mesatechnology, would also be conceivable. In particular in the case of semiconductor components configured as a U-MOSFET or as a V-MOSFET, the components typically have trenches in which there are provided the gate electrodes insulated through the use of a dielectric.
The semiconductor component according to the invention can advantageously be embodied as a power semiconductor component as well. Such power semiconductor components typically have a drift zone between the body zone and the drain zone. In the case of laterally configured semiconductor components, this drift zone may be provided at the surface of the semiconductor body between body zone and drain zone. However, in particular for reasons of saving chip area, the drift zone is moved into the semiconductor body in contemporary semiconductor components so that the drift path is formed by an epitaxial layer formed in the semiconductor, which is applied in a large-area manner to the drain zone which makes contact with the semiconductor body at the rear side of the wafer. In the case of vertically configured semiconductor components, the drift zone is typically formed by one or more epitaxial layers which are in each case stacked xe2x80x9clike a sandwichxe2x80x9d between the drain zone and the body zone. Typically, but not necessarily, the drift path generally or the epitaxial layer specifically has a very much lower doping concentration than the respective drain zone.
In particular in semiconductor components which have a multiplicity of individual transistors provided in a cell array, it is possible to vary the current densities within the cell array in a targeted manner by varying the thickness of the doping layer. Such semiconductor components constructed in a cell-like manner typically have a cell array, in which the active cells or individual transistors are provided, and an edge region, in which a potential is to be reduced in order to protect the semiconductor component. By virtue of the invention, the current density can be reduced in a suitable manner, for example toward the edge of the cell array by suitably increasing the layer thickness of the doping layers provided in the respective channel zones and the risk of a voltage breakdown at the edge can thus be reduced.
The invention is suitable primarily in the case of so-called smart power components, that is to say in the case of semiconductor components which have a very low blocking capability and in whichxe2x80x94as already mentioned in the introductionxe2x80x94the influence of the channel resistance if very large. The invention is particularly advantageous in the case of so-called short channel transistors or switching transistors which often do not have a drift region and in which the influence of the channel resistance in the total on resistance is thus the greatest.
With the objects of the invention in view there is also provided, a method of fabricating a doping layer in a vertically configured semiconductor component according to the invention, the method includes the steps of:
applying an epitaxial layer on a semiconductor body by using a thermal deposition process;
interrupting the thermal deposition process;
applying a thin doping layer of a given conductivity type by using a process selected from the group consisting of a vapor deposition process and a spinning-on process subsequent to cooling the semiconductor body; and
applying a further epitaxial layer to the doping layer by using a thermal deposition process.
According to another mode of the invention, between the step of applying the thin doping layer and the step of applying the further epitaxial layer, a silicon layer is applied to a cooled surface of the semiconductor body.
According to another mode of the invention, the step of applying the epitaxial layer and the step of applying the further epitaxial layer are-performed at a high temperature, in particular above 500xc2x0 C., and the step of applying the doping layer is performed substantially at room temperature.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a field-effect-controlled semiconductor component and a method of fabricating such a component, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.